Clock Tree clk Detail Report


*** NO Transition Time Violation
*** NO Capcitance Violation

Skew Distribution

Level 1
Input Delay Range Number of Buffer
12(ps) ~ 12.95(ps)
1
12.95(ps) ~ 13.9(ps)
1
13.9(ps) ~ 14.85(ps)
1
14.85(ps) ~ 15.8(ps)
3
15.8(ps) ~ 16.75(ps)
3
16.75(ps) ~ 17.7(ps)
1
17.7(ps) ~ 18.65(ps)
6
18.65(ps) ~ 19.6(ps)
2
19.6(ps) ~ 20.55(ps)
6
20.55(ps) ~ 21.5(ps)
4
(max, min, avg, skew) = (21.5(ps) 12(ps) 18.0321(ps) 9.5(ps))






Detail Phase Delay Report

TOP LEVEL:
clk (0 0)

LEVEL 1:
cellName = DFFSR
block_divider/regiA/q_reg[0]/CLK (0.0159 0.0159)
cellName = DFFSR
block_divider/regiA/q_reg[1]/CLK (0.0158 0.0158)
cellName = DFFSR
block_divider/regiA/q_reg[2]/CLK (0.0181 0.0181)
cellName = DFFSR
block_divider/regiA/q_reg[3]/CLK (0.018 0.018)
cellName = DFFSR
block_divider/regiA/q_reg[4]/CLK (0.0178 0.0178)
cellName = DFFSR
block_divider/regiA/q_reg[5]/CLK (0.0154 0.0154)
cellName = DFFSR
block_divider/regiA/q_reg[6]/CLK (0.0133 0.0133)
cellName = DFFSR
block_divider/regiA/q_reg[7]/CLK (0.0165 0.0165)
cellName = DFFSR
block_acc/q_reg[7]/CLK (0.012 0.012)
cellName = DFFSR
block_acc/q_reg[6]/CLK (0.0196 0.0196)
cellName = DFFSR
block_acc/q_reg[5]/CLK (0.0156 0.0156)
cellName = DFFSR
block_acc/q_reg[4]/CLK (0.02 0.02)
cellName = DFFSR
block_acc/q_reg[3]/CLK (0.0204 0.0204)
cellName = DFFSR
block_acc/q_reg[2]/CLK (0.0204 0.0204)
cellName = DFFSR
block_acc/q_reg[1]/CLK (0.0202 0.0202)
cellName = DFFSR
block_acc/q_reg[0]/CLK (0.0202 0.0202)
cellName = DFFSR
block_divider/regiB/q_reg[0]/CLK (0.0191 0.0191)
cellName = DFFSR
block_divider/regiB/q_reg[1]/CLK (0.0182 0.0182)
cellName = DFFSR
block_divider/regiB/q_reg[2]/CLK (0.0186 0.0186)
cellName = DFFSR
block_divider/regiB/q_reg[3]/CLK (0.0191 0.0191)
cellName = DFFSR
block_divider/regiB/q_reg[4]/CLK (0.0184 0.0184)
cellName = DFFSR
block_divider/regiB/q_reg[5]/CLK (0.0156 0.0156)
cellName = DFFSR
block_divider/regiB/q_reg[6]/CLK (0.0174 0.0174)
cellName = DFFSR
block_divider/regiB/q_reg[7]/CLK (0.0145 0.0145)
cellName = DFFSR
block_control/CURRENT_reg[3]/CLK (0.0215 0.0215)
cellName = DFFSR
block_control/CURRENT_reg[2]/CLK (0.0212 0.0212)
cellName = DFFSR
block_control/CURRENT_reg[1]/CLK (0.0206 0.0206)
cellName = DFFSR
block_control/CURRENT_reg[0]/CLK (0.0215 0.0215)