Index of /flows/MOSIS_SCMOS/iit_stdcells_v2.2

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[   ]iit_stdcells_flow_v2..>2017-01-22 15:44 222K 
[   ]iit_stdcells_ref_des..>2017-01-22 15:44 61M 

Standard Cells for AMI 0.6um, AMI 0.35um, TSMC 0.25um, and TSMC 0.18um



Welcome to System on Chip (SoC) Design Flows at the Illinois Institute of Technology for AMI 0.6um, AMI 0.35um, TSMC 0.25um, TSMC 0.18um brought to you by the VLSI Computer Architecture, Arithmetic, and CAD Research Group group at the Illinois Institute of Technology!

Portions of the tools here are funded in part by Cadence Design Systems, Inc.

This is Version 2.2
Note: The library has not been modified for version 2.2
Please continue to use version 2.1

The release is split into 3 parts



All bugs, comments, questions, or any criticisms are highly encouraged. Please contact James Stine at jstine@ece.iit.edu to contribute to the cause.