Clock Tree clk Detail Report


*** NO Transition Time Violation
*** NO Capcitance Violation

Skew Distribution

Level 1
Input Delay Range Number of Buffer
8.9(ps) ~ 9.99(ps)
4
9.99(ps) ~ 11.08(ps)
4
11.08(ps) ~ 12.17(ps)
6
12.17(ps) ~ 13.26(ps)
0
13.26(ps) ~ 14.35(ps)
0
14.35(ps) ~ 15.44(ps)
0
15.44(ps) ~ 16.53(ps)
1
16.53(ps) ~ 17.62(ps)
5
17.62(ps) ~ 18.71(ps)
4
18.71(ps) ~ 19.8(ps)
4
(max, min, avg, skew) = (19.8(ps) 8.9(ps) 14.3214(ps) 10.9(ps))






Detail Phase Delay Report

TOP LEVEL:
clk (0 0)

LEVEL 1:
cellName = DFFSR
block_divider/regiA/q_reg[0]/CLK (0.0198 0.0198)
cellName = DFFSR
block_divider/regiA/q_reg[1]/CLK (0.0195 0.0195)
cellName = DFFSR
block_divider/regiA/q_reg[2]/CLK (0.0171 0.0171)
cellName = DFFSR
block_divider/regiA/q_reg[3]/CLK (0.0166 0.0166)
cellName = DFFSR
block_divider/regiA/q_reg[4]/CLK (0.0178 0.0178)
cellName = DFFSR
block_divider/regiA/q_reg[5]/CLK (0.01 0.01)
cellName = DFFSR
block_divider/regiA/q_reg[6]/CLK (0.0173 0.0173)
cellName = DFFSR
block_divider/regiA/q_reg[7]/CLK (0.018 0.018)
cellName = DFFSR
block_acc/q_reg[7]/CLK (0.0162 0.0162)
cellName = DFFSR
block_acc/q_reg[6]/CLK (0.0101 0.0101)
cellName = DFFSR
block_acc/q_reg[5]/CLK (0.009 0.009)
cellName = DFFSR
block_acc/q_reg[4]/CLK (0.0089 0.0089)
cellName = DFFSR
block_acc/q_reg[3]/CLK (0.0118 0.0118)
cellName = DFFSR
block_acc/q_reg[2]/CLK (0.0108 0.0108)
cellName = DFFSR
block_acc/q_reg[1]/CLK (0.0198 0.0198)
cellName = DFFSR
block_acc/q_reg[0]/CLK (0.0187 0.0187)
cellName = DFFSR
block_divider/regiB/q_reg[0]/CLK (0.018 0.018)
cellName = DFFSR
block_divider/regiB/q_reg[1]/CLK (0.0191 0.0191)
cellName = DFFSR
block_divider/regiB/q_reg[2]/CLK (0.0111 0.0111)
cellName = DFFSR
block_divider/regiB/q_reg[3]/CLK (0.012 0.012)
cellName = DFFSR
block_divider/regiB/q_reg[4]/CLK (0.0096 0.0096)
cellName = DFFSR
block_divider/regiB/q_reg[5]/CLK (0.0095 0.0095)
cellName = DFFSR
block_divider/regiB/q_reg[6]/CLK (0.0176 0.0176)
cellName = DFFSR
block_divider/regiB/q_reg[7]/CLK (0.0167 0.0167)
cellName = DFFSR
block_control/CURRENT_reg[3]/CLK (0.0116 0.0116)
cellName = DFFSR
block_control/CURRENT_reg[2]/CLK (0.011 0.011)
cellName = DFFSR
block_control/CURRENT_reg[1]/CLK (0.0119 0.0119)
cellName = DFFSR
block_control/CURRENT_reg[0]/CLK (0.0115 0.0115)