Clock Tree clk_i Detail Report
*** NO Transition Time Violation
*** NO Capcitance Violation
Skew Distribution
Level 1
Input Delay Range |
Number of Buffer |
34.3(ps) ~ 34.65(ps) | 2 |
34.65(ps) ~ 35(ps) | 0 |
35(ps) ~ 35.35(ps) | 0 |
35.35(ps) ~ 35.7(ps) | 2 |
(max, min, avg, skew) = (35.7(ps) 34.3(ps) 35(ps) 1.4(ps))
Output Delay Range | Number of Buffer |
178(ps) ~ 178.95(ps) | 1 |
178.95(ps) ~ 179.9(ps) | 0 |
179.9(ps) ~ 180.85(ps) | 1 |
180.85(ps) ~ 181.8(ps) | 2 |
(max, min, avg, skew) = (181.8(ps) 178(ps) 180.5(ps) 3.8(ps))
Level 2
Input Delay Range |
Number of Buffer |
186.9(ps) ~ 188.63(ps) | 1 |
188.63(ps) ~ 190.36(ps) | 1 |
190.36(ps) ~ 192.09(ps) | 0 |
192.09(ps) ~ 193.82(ps) | 2 |
193.82(ps) ~ 195.55(ps) | 1 |
195.55(ps) ~ 197.28(ps) | 2 |
197.28(ps) ~ 199.01(ps) | 4 |
199.01(ps) ~ 200.74(ps) | 1 |
200.74(ps) ~ 202.47(ps) | 2 |
202.47(ps) ~ 204.2(ps) | 2 |
(max, min, avg, skew) = (204.2(ps) 186.9(ps) 196.944(ps) 17.3(ps))
Output Delay Range | Number of Buffer |
389.6(ps) ~ 393.22(ps) | 1 |
393.22(ps) ~ 396.84(ps) | 0 |
396.84(ps) ~ 400.46(ps) | 1 |
400.46(ps) ~ 404.08(ps) | 0 |
404.08(ps) ~ 407.7(ps) | 1 |
407.7(ps) ~ 411.32(ps) | 1 |
411.32(ps) ~ 414.94(ps) | 6 |
414.94(ps) ~ 418.56(ps) | 1 |
418.56(ps) ~ 422.18(ps) | 2 |
422.18(ps) ~ 425.8(ps) | 3 |
(max, min, avg, skew) = (425.8(ps) 389.6(ps) 413.375(ps) 36.2(ps))
Level 3
Input Delay Range |
Number of Buffer |
396.7(ps) ~ 401.26(ps) | 2 |
401.26(ps) ~ 405.82(ps) | 0 |
405.82(ps) ~ 410.38(ps) | 10 |
410.38(ps) ~ 414.94(ps) | 14 |
414.94(ps) ~ 419.5(ps) | 24 |
419.5(ps) ~ 424.06(ps) | 59 |
424.06(ps) ~ 428.62(ps) | 68 |
428.62(ps) ~ 433.18(ps) | 53 |
433.18(ps) ~ 437.74(ps) | 44 |
437.74(ps) ~ 442.3(ps) | 22 |
(max, min, avg, skew) = (442.3(ps) 396.7(ps) 426.544(ps) 45.6(ps))
Detail Phase Delay Report
TOP LEVEL:
clk_i (0 0)
LEVEL 1:
cellName = INVX8
clk_i__L1_I3/A (0.0344 0.0344)
clk_i__L1_I3/Y (0.1815 0.1596)
cellName = INVX8
clk_i__L1_I2/A (0.0356 0.0356)
clk_i__L1_I2/Y (0.1807 0.1579)
cellName = INVX8
clk_i__L1_I1/A (0.0343 0.0343)
clk_i__L1_I1/Y (0.178 0.1554)
cellName = INVX8
clk_i__L1_I0/A (0.0357 0.0357)
clk_i__L1_I0/Y (0.1818 0.1598)
LEVEL 2:
cellName = INVX8
clk_i__L2_I15/A (0.1895 0.1678)
clk_i__L2_I15/Y (0.4127 0.4012)
cellName = INVX8
clk_i__L2_I14/A (0.1988 0.1774)
clk_i__L2_I14/Y (0.4119 0.4012)
cellName = INVX8
clk_i__L2_I13/A (0.1976 0.1761)
clk_i__L2_I13/Y (0.414 0.403)
cellName = INVX8
clk_i__L2_I12/A (0.1924 0.1708)
clk_i__L2_I12/Y (0.4145 0.4031)
cellName = INVX8
clk_i__L2_I11/A (0.1946 0.1721)
clk_i__L2_I11/Y (0.4061 0.3964)
cellName = INVX8
clk_i__L2_I10/A (0.198 0.1755)
clk_i__L2_I10/Y (0.4187 0.408)
cellName = INVX8
clk_i__L2_I9/A (0.2042 0.1821)
clk_i__L2_I9/Y (0.4248 0.4138)
cellName = INVX8
clk_i__L2_I8/A (0.2031 0.1809)
clk_i__L2_I8/Y (0.4258 0.4147)
cellName = INVX8
clk_i__L2_I7/A (0.1961 0.1737)
clk_i__L2_I7/Y (0.4109 0.4009)
cellName = INVX8
clk_i__L2_I6/A (0.201 0.1788)
clk_i__L2_I6/Y (0.4115 0.4018)
cellName = INVX8
clk_i__L2_I5/A (0.1963 0.174)
clk_i__L2_I5/Y (0.417 0.4063)
cellName = INVX8
clk_i__L2_I4/A (0.1986 0.1763)
clk_i__L2_I4/Y (0.4195 0.4088)
cellName = INVX8
clk_i__L2_I3/A (0.1869 0.1649)
clk_i__L2_I3/Y (0.3999 0.3899)
cellName = INVX8
clk_i__L2_I2/A (0.2009 0.1794)
clk_i__L2_I2/Y (0.4146 0.404)
cellName = INVX8
clk_i__L2_I1/A (0.1934 0.1716)
clk_i__L2_I1/Y (0.3896 0.3775)
cellName = INVX8
clk_i__L2_I0/A (0.1997 0.1781)
clk_i__L2_I0/Y (0.4225 0.411)
LEVEL 3:
cellName = DFFPOSX1
inst_reg_reg_8/CLK (0.4234 0.4119)
cellName = DFFPOSX1
inst_reg_reg_9/CLK (0.4262 0.4147)
cellName = DFFPOSX1
inst_reg_reg_10/CLK (0.4232 0.4117)
cellName = DFFPOSX1
inst_reg_reg_13/CLK (0.4241 0.4126)
cellName = DFFPOSX1
w_reg_reg_2/CLK (0.4247 0.4132)
cellName = DFFPOSX1
w_reg_reg_5/CLK (0.425 0.4135)
cellName = DFFPOSX1
aluout_zero_node_reg/CLK (0.4245 0.413)
cellName = DFFPOSX1
option_reg_reg_0/CLK (0.4231 0.4116)
cellName = DFFPOSX1
option_reg_reg_1/CLK (0.4235 0.412)
cellName = DFFPOSX1
option_reg_reg_3/CLK (0.4223 0.4108)
cellName = DFFPOSX1
option_reg_reg_4/CLK (0.4244 0.4129)
cellName = DFFPOSX1
option_reg_reg_5/CLK (0.4224 0.4109)
cellName = DFFPOSX1
aluout_reg_reg_1/CLK (0.4252 0.4136)
cellName = DFFPOSX1
aluout_reg_reg_3/CLK (0.4259 0.4144)
cellName = DFFPOSX1
aluout_reg_reg_5/CLK (0.4239 0.4124)
cellName = DFFPOSX1
portb_o_reg_reg_5/CLK (0.4246 0.4131)
cellName = DFFPOSX1
writeram_reg_reg/CLK (0.4263 0.4148)
cellName = DFFPOSX1
inst_reg_reg_7/CLK (0.4237 0.4122)
cellName = DFFPOSX1
w_reg_reg_1/CLK (0.4253 0.4138)
cellName = DFFPOSX1
aluout_reg_reg_7/CLK (0.4316 0.4209)
cellName = DFFPOSX1
add_node_reg_5/CLK (0.4274 0.4167)
cellName = DFFPOSX1
add_node_reg_8/CLK (0.4312 0.4205)
cellName = DFFPOSX1
writew_node_reg/CLK (0.4283 0.4176)
cellName = DFFPOSX1
w_reg_reg_3/CLK (0.4227 0.412)
cellName = DFFPOSX1
w_reg_reg_4/CLK (0.4253 0.4146)
cellName = DFFPOSX1
w_reg_reg_7/CLK (0.4307 0.42)
cellName = DFFPOSX1
aluinp2_reg_reg_1/CLK (0.4247 0.4139)
cellName = DFFPOSX1
aluinp2_reg_reg_2/CLK (0.4283 0.4176)
cellName = DFFPOSX1
aluinp2_reg_reg_3/CLK (0.4273 0.4166)
cellName = DFFPOSX1
aluinp2_reg_reg_4/CLK (0.4269 0.4162)
cellName = DFFPOSX1
aluinp2_reg_reg_5/CLK (0.423 0.4123)
cellName = DFFPOSX1
aluinp2_reg_reg_6/CLK (0.4282 0.4175)
cellName = DFFPOSX1
aluinp2_reg_reg_7/CLK (0.427 0.4163)
cellName = DFFPOSX1
aluout_reg_reg_2/CLK (0.4296 0.4189)
cellName = DFFPOSX1
aluout_reg_reg_4/CLK (0.4286 0.4179)
cellName = DFFPOSX1
aluinp1_reg_reg_0/CLK (0.422 0.4113)
cellName = DFFPOSX1
w_reg_reg_0/CLK (0.4218 0.4111)
cellName = DFFPOSX1
aluinp1_reg_reg_5/CLK (0.4267 0.4157)
cellName = DFFPOSX1
aluinp2_reg_reg_0/CLK (0.433 0.422)
cellName = DFFPOSX1
add_node_reg_0/CLK (0.4335 0.4225)
cellName = DFFPOSX1
add_node_reg_1/CLK (0.4332 0.4222)
cellName = DFFPOSX1
add_node_reg_2/CLK (0.4327 0.4217)
cellName = DFFPOSX1
add_node_reg_3/CLK (0.4299 0.4189)
cellName = DFFPOSX1
status_reg_reg_0/CLK (0.4245 0.4135)
cellName = DFFPOSX1
status_reg_reg_1/CLK (0.435 0.424)
cellName = DFFPOSX1
intcon_reg_reg_1/CLK (0.4346 0.4236)
cellName = DFFPOSX1
aluout_reg_reg_0/CLK (0.4257 0.4147)
cellName = DFFPOSX1
addlow_node_reg_4/CLK (0.4343 0.4233)
cellName = DFFPOSX1
aluinp1_reg_reg_4/CLK (0.4257 0.4147)
cellName = DFFPOSX1
add_node_reg_4/CLK (0.4231 0.4121)
cellName = DFFPOSX1
ram_i_node_reg_0/CLK (0.4259 0.4149)
cellName = DFFPOSX1
intcon_reg_reg_0/CLK (0.4264 0.4154)
cellName = DFFPOSX1
status_reg_reg_2/CLK (0.4262 0.4152)
cellName = DFFPOSX1
aluinp1_reg_reg_3/CLK (0.4259 0.4149)
cellName = DFFPOSX1
intcon_reg_reg_7/CLK (0.426 0.415)
cellName = DFFPOSX1
pclath_reg_reg_2/CLK (0.4323 0.4209)
cellName = DFFPOSX1
aluinp1_reg_reg_2/CLK (0.4329 0.4216)
cellName = DFFPOSX1
aluinp1_reg_reg_7/CLK (0.4333 0.4219)
cellName = DFFPOSX1
aluinp1_reg_reg_6/CLK (0.4322 0.4208)
cellName = DFFPOSX1
aluinp1_reg_reg_1/CLK (0.4304 0.4191)
cellName = DFFPOSX1
ram_i_node_reg_7/CLK (0.4288 0.4175)
cellName = DFFPOSX1
ram_i_node_reg_4/CLK (0.4309 0.4195)
cellName = DFFPOSX1
ram_i_node_reg_3/CLK (0.4273 0.4159)
cellName = DFFPOSX1
ram_i_node_reg_2/CLK (0.4294 0.418)
cellName = DFFPOSX1
ram_i_node_reg_1/CLK (0.4313 0.4199)
cellName = DFFPOSX1
option_reg_reg_2/CLK (0.4348 0.4234)
cellName = DFFPOSX1
pclath_reg_reg_4/CLK (0.428 0.4166)
cellName = DFFPOSX1
pclath_reg_reg_3/CLK (0.4269 0.4155)
cellName = DFFPOSX1
pclath_reg_reg_1/CLK (0.4318 0.4204)
cellName = DFFPOSX1
status_reg_reg_4/CLK (0.4319 0.4205)
cellName = DFFPOSX1
add_node_reg_7/CLK (0.4334 0.422)
cellName = DFFPOSX1
add_node_reg_6/CLK (0.4332 0.4219)
cellName = DFFPOSX1
w_reg_reg_6/CLK (0.4348 0.4235)
cellName = DFFPOSX1
pclath_reg_reg_0/CLK (0.428 0.4166)
cellName = DFFPOSX1
intcon_reg_reg_3/CLK (0.4184 0.4087)
cellName = DFFPOSX1
status_reg_reg_7/CLK (0.4162 0.4065)
cellName = DFFPOSX1
stack_reg_reg_0_7/CLK (0.4199 0.4102)
cellName = DFFPOSX1
stack_reg_reg_2_12/CLK (0.4204 0.4107)
cellName = DFFPOSX1
reset_condition_reg/CLK (0.4184 0.4086)
cellName = DFFPOSX1
status_reg_reg_3/CLK (0.4147 0.405)
cellName = DFFPOSX1
status_reg_reg_5/CLK (0.4154 0.4057)
cellName = DFFPOSX1
status_reg_reg_6/CLK (0.4144 0.4047)
cellName = DFFPOSX1
inc_pc_node_reg_5/CLK (0.418 0.4083)
cellName = DFFPOSX1
inc_pc_node_reg_6/CLK (0.4179 0.4081)
cellName = DFFPOSX1
inc_pc_node_reg_7/CLK (0.4159 0.4062)
cellName = DFFPOSX1
intcon_reg_reg_5/CLK (0.4178 0.4081)
cellName = DFFPOSX1
intcon_reg_reg_6/CLK (0.4178 0.4081)
cellName = DFFPOSX1
pc_reg_reg_5/CLK (0.4195 0.4098)
cellName = DFFPOSX1
pc_reg_reg_6/CLK (0.4179 0.4082)
cellName = DFFPOSX1
ram_i_node_reg_5/CLK (0.4145 0.4048)
cellName = DFFPOSX1
ram_i_node_reg_6/CLK (0.4159 0.4062)
cellName = DFFPOSX1
pc_reg_reg_7/CLK (0.416 0.4063)
cellName = DFFPOSX1
stack_reg_reg_4_10/CLK (0.4257 0.415)
cellName = DFFPOSX1
stack_reg_reg_4_2/CLK (0.428 0.4173)
cellName = DFFPOSX1
stack_reg_reg_6_11/CLK (0.4282 0.4175)
cellName = DFFPOSX1
stack_reg_reg_7_11/CLK (0.4288 0.4181)
cellName = DFFPOSX1
stack_reg_reg_3_6/CLK (0.4285 0.4177)
cellName = DFFPOSX1
stack_reg_reg_0_2/CLK (0.4263 0.4156)
cellName = DFFPOSX1
stack_reg_reg_0_11/CLK (0.4288 0.4181)
cellName = DFFPOSX1
stack_reg_reg_1_2/CLK (0.4227 0.412)
cellName = DFFPOSX1
stack_reg_reg_1_5/CLK (0.4295 0.4188)
cellName = DFFPOSX1
stack_reg_reg_1_7/CLK (0.4297 0.4189)
cellName = DFFPOSX1
stack_reg_reg_1_11/CLK (0.4281 0.4174)
cellName = DFFPOSX1
stack_reg_reg_3_8/CLK (0.4252 0.4145)
cellName = DFFPOSX1
stack_reg_reg_4_7/CLK (0.4243 0.4136)
cellName = DFFPOSX1
stack_reg_reg_5_7/CLK (0.4296 0.4189)
cellName = DFFPOSX1
stack_reg_reg_6_10/CLK (0.4294 0.4186)
cellName = DFFPOSX1
stack_reg_reg_7_7/CLK (0.428 0.4173)
cellName = DFFPOSX1
stack_reg_reg_4_11/CLK (0.4259 0.4152)
cellName = DFFPOSX1
stack_reg_reg_5_2/CLK (0.4272 0.4165)
cellName = DFFPOSX1
stack_reg_reg_5_8/CLK (0.4298 0.419)
cellName = DFFPOSX1
stack_reg_reg_1_8/CLK (0.4392 0.4282)
cellName = DFFPOSX1
stack_reg_reg_0_12/CLK (0.4401 0.4291)
cellName = DFFPOSX1
stack_reg_reg_3_10/CLK (0.442 0.4309)
cellName = DFFPOSX1
stack_reg_reg_2_10/CLK (0.4368 0.4258)
cellName = DFFPOSX1
stack_reg_reg_2_6/CLK (0.4368 0.4258)
cellName = DFFPOSX1
stack_reg_reg_1_12/CLK (0.4367 0.4257)
cellName = DFFPOSX1
stack_reg_reg_1_10/CLK (0.4395 0.4285)
cellName = DFFPOSX1
stack_reg_reg_1_9/CLK (0.4289 0.4179)
cellName = DFFPOSX1
stack_reg_reg_1_6/CLK (0.4383 0.4273)
cellName = DFFPOSX1
stack_reg_reg_0_10/CLK (0.4327 0.4217)
cellName = DFFPOSX1
stack_reg_reg_0_9/CLK (0.4329 0.4219)
cellName = DFFPOSX1
stack_reg_reg_0_8/CLK (0.4336 0.4226)
cellName = DFFPOSX1
stack_reg_reg_0_6/CLK (0.4397 0.4287)
cellName = DFFPOSX1
inc_pc_node_reg_8/CLK (0.4338 0.4228)
cellName = DFFPOSX1
stack_reg_reg_2_9/CLK (0.4416 0.4306)
cellName = DFFPOSX1
stack_reg_reg_3_9/CLK (0.4417 0.4307)
cellName = DFFPOSX1
stack_reg_reg_3_12/CLK (0.4423 0.4313)
cellName = DFFPOSX1
pc_reg_reg_12/CLK (0.4331 0.4221)
cellName = DFFPOSX1
pc_reg_reg_9/CLK (0.4398 0.4288)
cellName = DFFPOSX1
stack_reg_reg_6_7/CLK (0.4386 0.4274)
cellName = DFFPOSX1
stack_reg_reg_2_8/CLK (0.4379 0.4268)
cellName = DFFPOSX1
stack_reg_reg_4_8/CLK (0.4375 0.4264)
cellName = DFFPOSX1
stack_reg_reg_4_12/CLK (0.4372 0.4261)
cellName = DFFPOSX1
stack_reg_reg_5_10/CLK (0.4345 0.4234)
cellName = DFFPOSX1
stack_reg_reg_7_6/CLK (0.4373 0.4262)
cellName = DFFPOSX1
stack_reg_reg_7_12/CLK (0.4375 0.4264)
cellName = DFFPOSX1
stack_reg_reg_7_10/CLK (0.4358 0.4246)
cellName = DFFPOSX1
stack_reg_reg_7_9/CLK (0.4378 0.4266)
cellName = DFFPOSX1
stack_reg_reg_7_8/CLK (0.4381 0.4269)
cellName = DFFPOSX1
stack_reg_reg_6_12/CLK (0.4385 0.4274)
cellName = DFFPOSX1
stack_reg_reg_6_9/CLK (0.4372 0.4261)
cellName = DFFPOSX1
stack_reg_reg_6_8/CLK (0.4385 0.4274)
cellName = DFFPOSX1
stack_reg_reg_6_6/CLK (0.4377 0.4265)
cellName = DFFPOSX1
stack_reg_reg_5_12/CLK (0.4326 0.4214)
cellName = DFFPOSX1
stack_reg_reg_5_9/CLK (0.4353 0.4242)
cellName = DFFPOSX1
stack_reg_reg_5_6/CLK (0.4371 0.426)
cellName = DFFPOSX1
stack_reg_reg_4_9/CLK (0.4376 0.4265)
cellName = DFFPOSX1
stack_reg_reg_4_6/CLK (0.4361 0.425)
cellName = DFFPOSX1
porta_i_sync_reg_reg_2/CLK (0.4237 0.4137)
cellName = DFFPOSX1
ram_adr_reg_reg_3/CLK (0.4232 0.4131)
cellName = DFFPOSX1
aluout_reg_reg_6/CLK (0.4258 0.4158)
cellName = DFFPOSX1
option_reg_reg_7/CLK (0.4247 0.4147)
cellName = DFFPOSX1
ram_adr_reg_reg_8/CLK (0.4208 0.4107)
cellName = DFFPOSX1
ram_adr_reg_reg_7/CLK (0.4223 0.4123)
cellName = DFFPOSX1
ram_adr_reg_reg_2/CLK (0.4231 0.4131)
cellName = DFFPOSX1
trisb_reg_reg_7/CLK (0.4218 0.4118)
cellName = DFFPOSX1
trisb_reg_reg_6/CLK (0.4193 0.4093)
cellName = DFFPOSX1
trisb_reg_reg_2/CLK (0.4191 0.4091)
cellName = DFFPOSX1
fsr_reg_reg_7/CLK (0.421 0.411)
cellName = DFFPOSX1
fsr_reg_reg_6/CLK (0.4214 0.4113)
cellName = DFFPOSX1
fsr_reg_reg_4/CLK (0.4236 0.4136)
cellName = DFFPOSX1
fsr_reg_reg_2/CLK (0.4215 0.4115)
cellName = DFFPOSX1
fsr_reg_reg_0/CLK (0.4218 0.4117)
cellName = DFFPOSX1
option_reg_reg_6/CLK (0.4253 0.4152)
cellName = DFFPOSX1
fsr_reg_reg_3/CLK (0.4171 0.4071)
cellName = DFFPOSX1
trisb_reg_reg_4/CLK (0.4249 0.4149)
cellName = DFFPOSX1
portb_i_sync_reg_reg_7/CLK (0.4198 0.4101)
cellName = DFFPOSX1
trisa_reg_reg_3/CLK (0.423 0.4132)
cellName = DFFPOSX1
porta_o_reg_reg_2/CLK (0.4221 0.4124)
cellName = DFFPOSX1
porta_o_reg_reg_3/CLK (0.4225 0.4128)
cellName = DFFPOSX1
porta_i_sync_reg_reg_0/CLK (0.4193 0.4096)
cellName = DFFPOSX1
porta_i_sync_reg_reg_1/CLK (0.4202 0.4105)
cellName = DFFPOSX1
porta_i_sync_reg_reg_3/CLK (0.42 0.4103)
cellName = DFFPOSX1
porta_i_sync_reg_reg_4/CLK (0.4226 0.4129)
cellName = DFFPOSX1
portb_o_reg_reg_1/CLK (0.4226 0.4128)
cellName = DFFPOSX1
portb_o_reg_reg_2/CLK (0.4193 0.4096)
cellName = DFFPOSX1
portb_i_sync_reg_reg_0/CLK (0.4225 0.4128)
cellName = DFFPOSX1
portb_i_sync_reg_reg_1/CLK (0.4186 0.4089)
cellName = DFFPOSX1
portb_i_sync_reg_reg_2/CLK (0.4234 0.4137)
cellName = DFFPOSX1
portb_i_sync_reg_reg_3/CLK (0.4227 0.413)
cellName = DFFPOSX1
portb_i_sync_reg_reg_4/CLK (0.4194 0.4097)
cellName = DFFPOSX1
portb_i_sync_reg_reg_6/CLK (0.4205 0.4108)
cellName = DFFPOSX1
portb_o_reg_reg_3/CLK (0.4213 0.4116)
cellName = DFFPOSX1
trisa_reg_reg_1/CLK (0.4235 0.4138)
cellName = DFFPOSX1
inc_pc_node_reg_11/CLK (0.4312 0.4205)
cellName = DFFPOSX1
pc_reg_reg_11/CLK (0.4312 0.4204)
cellName = DFFPOSX1
inc_pc_node_reg_12/CLK (0.4301 0.4194)
cellName = DFFPOSX1
inst_reg_reg_0/CLK (0.429 0.4183)
cellName = DFFPOSX1
inst_reg_reg_1/CLK (0.4232 0.4125)
cellName = DFFPOSX1
inst_reg_reg_2/CLK (0.4259 0.4151)
cellName = DFFPOSX1
inst_reg_reg_3/CLK (0.4231 0.4124)
cellName = DFFPOSX1
inst_reg_reg_4/CLK (0.427 0.4163)
cellName = DFFPOSX1
inst_reg_reg_5/CLK (0.4247 0.414)
cellName = DFFPOSX1
inst_reg_reg_6/CLK (0.4233 0.4126)
cellName = DFFPOSX1
inc_pc_node_reg_9/CLK (0.4328 0.4221)
cellName = DFFPOSX1
inc_pc_node_reg_10/CLK (0.4333 0.4225)
cellName = DFFPOSX1
pc_reg_reg_8/CLK (0.4316 0.4209)
cellName = DFFPOSX1
ram_adr_reg_reg_0/CLK (0.4276 0.4169)
cellName = DFFPOSX1
ram_adr_reg_reg_1/CLK (0.4275 0.4168)
cellName = DFFPOSX1
ram_adr_reg_reg_4/CLK (0.4272 0.4165)
cellName = DFFPOSX1
ram_adr_reg_reg_5/CLK (0.4265 0.4158)
cellName = DFFPOSX1
pc_reg_reg_10/CLK (0.4326 0.4218)
cellName = DFFPOSX1
ram_adr_reg_reg_6/CLK (0.4235 0.4127)
cellName = DFFPOSX1
trisa_reg_reg_2/CLK (0.437 0.4263)
cellName = DFFPOSX1
porta_o_reg_reg_4/CLK (0.4305 0.4198)
cellName = DFFPOSX1
trisa_reg_reg_4/CLK (0.4309 0.4202)
cellName = DFFPOSX1
porta_o_reg_reg_0/CLK (0.4369 0.4261)
cellName = DFFPOSX1
fsr_reg_reg_1/CLK (0.4306 0.4199)
cellName = DFFPOSX1
portb_o_reg_reg_6/CLK (0.4303 0.4196)
cellName = DFFPOSX1
fsr_reg_reg_5/CLK (0.4309 0.4202)
cellName = DFFPOSX1
porta_o_reg_reg_1/CLK (0.4369 0.4262)
cellName = DFFPOSX1
portb_o_reg_reg_0/CLK (0.4309 0.4202)
cellName = DFFPOSX1
portb_i_sync_reg_reg_5/CLK (0.4346 0.4239)
cellName = DFFPOSX1
portb_o_reg_reg_7/CLK (0.4296 0.4189)
cellName = DFFPOSX1
trisb_reg_reg_5/CLK (0.4312 0.4205)
cellName = DFFPOSX1
trisb_reg_reg_3/CLK (0.4373 0.4265)
cellName = DFFPOSX1
trisb_reg_reg_1/CLK (0.4327 0.422)
cellName = DFFPOSX1
trisb_reg_reg_0/CLK (0.4354 0.4247)
cellName = DFFPOSX1
trisa_reg_reg_0/CLK (0.429 0.4183)
cellName = DFFPOSX1
inst_reg_reg_12/CLK (0.4296 0.4188)
cellName = DFFPOSX1
inst_reg_reg_11/CLK (0.4321 0.4214)
cellName = DFFPOSX1
portb_o_reg_reg_4/CLK (0.4302 0.4195)
cellName = DFFPOSX1
stack_reg_reg_4_5/CLK (0.4143 0.4042)
cellName = DFFPOSX1
stack_reg_reg_5_11/CLK (0.4134 0.4034)
cellName = DFFPOSX1
stack_reg_reg_0_5/CLK (0.4144 0.4044)
cellName = DFFPOSX1
stack_pnt_reg_reg_0/CLK (0.4084 0.3984)
cellName = DFFPOSX1
stack_reg_reg_3_2/CLK (0.4097 0.3997)
cellName = DFFPOSX1
stack_reg_reg_3_7/CLK (0.4116 0.4016)
cellName = DFFPOSX1
stack_reg_reg_2_2/CLK (0.4102 0.4002)
cellName = DFFPOSX1
stack_reg_reg_2_11/CLK (0.4117 0.4016)
cellName = DFFPOSX1
stack_reg_reg_5_5/CLK (0.4132 0.4032)
cellName = DFFPOSX1
stack_reg_reg_7_5/CLK (0.4129 0.4028)
cellName = DFFPOSX1
stack_reg_reg_5_1/CLK (0.4126 0.4026)
cellName = DFFPOSX1
stack_reg_reg_3_11/CLK (0.4111 0.4011)
cellName = DFFPOSX1
stack_reg_reg_5_0/CLK (0.4087 0.3987)
cellName = DFFPOSX1
stack_reg_reg_6_5/CLK (0.4077 0.3977)
cellName = DFFPOSX1
stack_reg_reg_2_5/CLK (0.4078 0.3978)
cellName = DFFPOSX1
stack_pnt_reg_reg_2/CLK (0.4088 0.3987)
cellName = DFFPOSX1
stack_reg_reg_2_7/CLK (0.4092 0.3991)
cellName = DFFPOSX1
stack_reg_reg_3_5/CLK (0.4106 0.4006)
cellName = DFFPOSX1
inte_sync_reg_reg/CLK (0.425 0.4143)
cellName = DFFPOSX1
writeram_node_reg/CLK (0.4281 0.4175)
cellName = DFFPOSX1
inc_pc_node_reg_0/CLK (0.4275 0.4169)
cellName = DFFPOSX1
inc_pc_node_reg_1/CLK (0.4264 0.4157)
cellName = DFFPOSX1
inc_pc_node_reg_2/CLK (0.4184 0.4078)
cellName = DFFPOSX1
inc_pc_node_reg_3/CLK (0.4252 0.4146)
cellName = DFFPOSX1
inc_pc_node_reg_4/CLK (0.4228 0.4121)
cellName = DFFPOSX1
intclr_reg_reg/CLK (0.4205 0.4099)
cellName = DFFPOSX1
intcon_reg_reg_2/CLK (0.4276 0.4169)
cellName = DFFPOSX1
intcon_reg_reg_4/CLK (0.4285 0.4179)
cellName = DFFPOSX1
pc_reg_reg_0/CLK (0.4271 0.4165)
cellName = DFFPOSX1
pc_reg_reg_2/CLK (0.4265 0.4159)
cellName = DFFPOSX1
pc_reg_reg_3/CLK (0.4232 0.4126)
cellName = DFFPOSX1
pc_reg_reg_4/CLK (0.4269 0.4163)
cellName = DFFPOSX1
exec_op_reg_reg/CLK (0.426 0.4154)
cellName = DFFPOSX1
intstart_reg_reg/CLK (0.4259 0.4152)
cellName = DFFPOSX1
sleepflag_reg_reg/CLK (0.4232 0.4126)
cellName = DFFPOSX1
int_node_reg/CLK (0.4291 0.4184)
cellName = DFFPOSX1
stack_reg_reg_4_0/CLK (0.4201 0.4077)
cellName = DFFPOSX1
stack_reg_reg_7_3/CLK (0.4174 0.405)
cellName = DFFPOSX1
stack_reg_reg_4_4/CLK (0.4182 0.4059)
cellName = DFFPOSX1
stack_reg_reg_2_3/CLK (0.42 0.4076)
cellName = DFFPOSX1
stack_reg_reg_5_3/CLK (0.4128 0.4005)
cellName = DFFPOSX1
stack_reg_reg_5_4/CLK (0.408 0.3957)
cellName = DFFPOSX1
stack_reg_reg_4_1/CLK (0.4211 0.4088)
cellName = DFFPOSX1
stack_reg_reg_6_0/CLK (0.4185 0.4061)
cellName = DFFPOSX1
stack_reg_reg_6_2/CLK (0.4209 0.4085)
cellName = DFFPOSX1
stack_reg_reg_6_3/CLK (0.4195 0.4071)
cellName = DFFPOSX1
stack_reg_reg_7_2/CLK (0.4208 0.4085)
cellName = DFFPOSX1
stack_reg_reg_7_1/CLK (0.4204 0.4081)
cellName = DFFPOSX1
stack_reg_reg_4_3/CLK (0.4188 0.4065)
cellName = DFFPOSX1
stack_reg_reg_6_4/CLK (0.3967 0.3845)
cellName = DFFPOSX1
stack_reg_reg_7_4/CLK (0.4201 0.4078)
cellName = DFFPOSX1
stack_reg_reg_7_0/CLK (0.4068 0.3944)
cellName = DFFPOSX1
stack_reg_reg_6_1/CLK (0.4212 0.4089)
cellName = DFFPOSX1
stack_pnt_reg_reg_1/CLK (0.397 0.3847)
cellName = DFFPOSX1
state_reg_reg_2/CLK (0.4335 0.4219)
cellName = DFFPOSX1
stack_reg_reg_0_1/CLK (0.4355 0.4239)
cellName = DFFPOSX1
stack_reg_reg_2_1/CLK (0.4332 0.4217)
cellName = DFFPOSX1
state_reg_reg_1/CLK (0.4309 0.4194)
cellName = DFFPOSX1
stack_reg_reg_0_4/CLK (0.4409 0.4294)
cellName = DFFPOSX1
pc_reg_reg_1/CLK (0.4362 0.4247)
cellName = DFFPOSX1
stack_reg_reg_3_1/CLK (0.4351 0.4236)
cellName = DFFPOSX1
stack_reg_reg_3_0/CLK (0.4351 0.4236)
cellName = DFFPOSX1
stack_reg_reg_2_4/CLK (0.4313 0.4198)
cellName = DFFPOSX1
stack_reg_reg_2_0/CLK (0.4413 0.4297)
cellName = DFFPOSX1
stack_reg_reg_1_4/CLK (0.4398 0.4282)
cellName = DFFPOSX1
stack_reg_reg_1_3/CLK (0.439 0.4275)
cellName = DFFPOSX1
stack_reg_reg_1_1/CLK (0.436 0.4245)
cellName = DFFPOSX1
stack_reg_reg_1_0/CLK (0.436 0.4245)
cellName = DFFPOSX1
stack_reg_reg_0_3/CLK (0.4414 0.4299)
cellName = DFFPOSX1
stack_reg_reg_0_0/CLK (0.4382 0.4267)
cellName = DFFPOSX1
stack_reg_reg_3_3/CLK (0.437 0.4254)
cellName = DFFPOSX1
state_reg_reg_0/CLK (0.431 0.4195)
cellName = DFFPOSX1
stack_reg_reg_3_4/CLK (0.4364 0.4248)