Clock Tree clk Detail Report
*** NO Transition Time Violation
*** NO Capcitance Violation
Skew Distribution
Level 1
Input Delay Range |
Number of Buffer |
18(ps) ~ 19.41(ps) | 1 |
19.41(ps) ~ 20.82(ps) | 1 |
20.82(ps) ~ 22.23(ps) | 3 |
22.23(ps) ~ 23.64(ps) | 4 |
23.64(ps) ~ 25.05(ps) | 5 |
25.05(ps) ~ 26.46(ps) | 4 |
26.46(ps) ~ 27.87(ps) | 2 |
27.87(ps) ~ 29.28(ps) | 2 |
29.28(ps) ~ 30.69(ps) | 2 |
30.69(ps) ~ 32.1(ps) | 4 |
(max, min, avg, skew) = (32.1(ps) 18(ps) 25.6107(ps) 14.1(ps))
Detail Phase Delay Report
TOP LEVEL:
clk (0 0)
LEVEL 1:
cellName = DFFPOSX1
block_acc/q_reg_6/CLK (0.0212 0.0212)
cellName = DFFPOSX1
block_acc/q_reg_5/CLK (0.025 0.025)
cellName = DFFPOSX1
block_acc/q_reg_4/CLK (0.018 0.018)
cellName = DFFPOSX1
block_acc/q_reg_3/CLK (0.0225 0.0225)
cellName = DFFPOSX1
block_acc/q_reg_2/CLK (0.024 0.024)
cellName = DFFPOSX1
block_acc/q_reg_1/CLK (0.023 0.023)
cellName = DFFPOSX1
block_acc/q_reg_7/CLK (0.0212 0.0212)
cellName = DFFPOSX1
block_acc/q_reg_0/CLK (0.0205 0.0205)
cellName = DFFPOSX1
block_control/CURRENT_reg_0/CLK (0.0263 0.0263)
cellName = DFFPOSX1
block_control/CURRENT_reg_1/CLK (0.0271 0.0271)
cellName = DFFPOSX1
block_control/CURRENT_reg_2/CLK (0.0279 0.0279)
cellName = DFFPOSX1
block_control/CURRENT_reg_3/CLK (0.0267 0.0267)
cellName = DFFPOSX1
block_divider/regiA/q_reg_6/CLK (0.0221 0.0221)
cellName = DFFPOSX1
block_divider/regiA/q_reg_5/CLK (0.0238 0.0238)
cellName = DFFPOSX1
block_divider/regiA/q_reg_4/CLK (0.0251 0.0251)
cellName = DFFPOSX1
block_divider/regiA/q_reg_3/CLK (0.0319 0.0319)
cellName = DFFPOSX1
block_divider/regiA/q_reg_2/CLK (0.0305 0.0305)
cellName = DFFPOSX1
block_divider/regiA/q_reg_1/CLK (0.0286 0.0286)
cellName = DFFPOSX1
block_divider/regiA/q_reg_7/CLK (0.0251 0.0251)
cellName = DFFPOSX1
block_divider/regiA/q_reg_0/CLK (0.0316 0.0316)
cellName = DFFPOSX1
block_divider/regiB/q_reg_7/CLK (0.0251 0.0251)
cellName = DFFPOSX1
block_divider/regiB/q_reg_6/CLK (0.0249 0.0249)
cellName = DFFPOSX1
block_divider/regiB/q_reg_5/CLK (0.0229 0.0229)
cellName = DFFPOSX1
block_divider/regiB/q_reg_4/CLK (0.0238 0.0238)
cellName = DFFPOSX1
block_divider/regiB/q_reg_3/CLK (0.0236 0.0236)
cellName = DFFPOSX1
block_divider/regiB/q_reg_2/CLK (0.0321 0.0321)
cellName = DFFPOSX1
block_divider/regiB/q_reg_1/CLK (0.0306 0.0306)
cellName = DFFPOSX1
block_divider/regiB/q_reg_0/CLK (0.032 0.032)